The present application relates generally to an improved data processing apparatus and method and more specifically to mechanisms for dynamic adjustment of operational parameters to compensate for sensor based measurements of circuit degradation.
Integrated circuit designers plan for the aging or power-on hours (POH) of silicon in integrated circuit devices based on modeling various degradations to the silicon with degradation dependent on, for example, unique characteristics that arise from manufacturing, such as effective gate conductor length (Lpoly) of critical circuits for a given chip or wafer (L) and a magnitude coefficient that varies by wafer or lot (A), and run-time operational characteristics experienced by the silicon, such as junction temperature (T), frequency of operation (F), which is often augmented by a generic switching factor assumption (FR), and voltage of operation (Vds).
Degradation caused by voltage of operation (Vds) or biasing of the voltage of operation (Vds) in aging circuits may cause an increase in threshold voltage that further lowers performance over time. That is, the increased threshold voltage changes the timing guard band and guard band protection circuits (such as the critical path monitor (CPM) circuit, RAZOR circuit, or the like), which normally detect the timing guard band, may not detect this degradation because the guard band protection circuits do not age at the same rate as typical circuits. Thus, traditional product approach to compensating for degradation over silicon lifetime is to set a voltage of operation and/or a frequency of operation based on end-of-life timing margins.